1. Field of the Invention
This invention relates to semiconductor devices, and, more particularly, to a method of fabricating a semiconductor device, a through substrate via process, and a substrate with through vias.
2. Description of Related Art
A through silicon via (TSV) process is popular in recent years. A substrate of a semiconductor device is etched by the TSV process to form a vertical hole. The vertical hole is filled with an insulating layer and a conductive material to form a conductive pillar. A solder ball may be disposed on the conductive pillar, to provide an electric connection interface. A cutting process and a die packaging process are then performed to form a semiconductor device.
After the substrate with through vias is formed on the substrate, the thickness of the insulating layer formed on the substrate is limited by a conventional chemical vapor deposition process, and is generally less than 2.5 micro meters. Too thick the insulating layer in the through substrate via affects the performance of a subsequent electroplating process. Moreover, a conductive layer formed in a through substrate via structure is easily affected by a dielectric constant, a thickness and a size of the insulating layer. As a result, current leakage or capacitance phenomenon may occur.